This page documents the test results on various emulators for test ROMs. Links to test ROMs: *[http://gbdev.gg8.se/files/roms/blargg-gb-tests/] *[https://github.com/sinamas/gambatte/tree/master/test] Note, tests below only list Blargg's test results, not Gambatte's extensive test suite. [module:SetTableAttributes|pattern=@^Fail@|style=color:black;background:#FF8080] [module:SetTableAttributes|pattern=@^Pass@|style=color:black;background:#80FF80] [module:SetTableAttributes|pattern=@^Couldn't open@|style=background:#FFFF80] [module:SetTableAttributes|pattern=@^No@|style=background:#FF8080] ||Emulator||CPU||Sound|||MEM||OAM||Total||Grade|| ||Amount||12||24||3||8||47||100.0%|| |TGB Dual Vol. 7 build 2053|1|1|0|2|4|8.5%| |VGB|6|1|0|2|9|19.2%| |no$gmb 2.5|9|1|0|2|12|25.5%| |DMGBoy 2.0|9|3|0|2|14|29.8%| |VBA-rr v24m svn480|12|1|2|3|18|38.3%| |Nintemulator[#1] 0.1|12|7|3|3|25|53.2%| |BSNES/higan|12|16|3|2|33|70.2%| |VBA-M 2.0.0 Beta2|12|17|2|3|34|72.3%| |Gearboy 0.5|12|23|0|3|38|80.8%| |BGB 1.5.3|12|24|3|3|42|89.4%| |Gambatte|12|24|3|3|42|89.4%| |BizHawk|12|24|3|3|42|89.4%| ||Test||VBAv24msvn480||VBAv23.6svn480||Bizhawk 1.1.0||BSNES/higan||Gambatte r571||BGB 1.5.3||Gearboy 0.5||TGB Dual Vol. 7 build 2053||no$gmb 2.5||DMGBoy 2.0||Nintemulator 0.1||VGB v4.6||VBA-M 2.0.0 Beta2|| ||CGB Sound|| |01 Registers|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Pass|Pass|Fail|Pass| |02 Len Ctr|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Pass|Fail|Pass| |03 Triggers|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |04 Sweep|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail (crash)|Pass| |05 Sweep Details|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail (crash)|Pass| |06 Overflow on Trigger|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |07 Len Sweep Period Sync|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |08 len ctr during power|Fail|Fail|Pass|Fail|Pass|Pass|Pass|Fail|Fail|Fail|Pass|Fail|Pass| |09 wave read while on|Fail|Fail|Pass|Fail|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Fail|Fail| |10 wave trigger while on|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass| |11 legs after power|Fail|Fail|Pass|Fail|Pass|Pass|Pass|Fail (crash)|Fail|Fail|Pass|Fail|Pass| |12 wave|Fail|Fail|Pass|Fail|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Fail| ||CPU Instrs|| |01 Special|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Fail|Pass| |02 interrupts|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Fail|Pass| |03 op sphl|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Pass|Pass|Fail|Pass| |04 op r imm|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Pass|Pass| |05 op rp|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Pass|Pass|Pass|Pass| |06 ld r r|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Pass|Pass| |07 jr jp call ret rst|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass| |08 misc instrs|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Pass|Pass| |09 op r r|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Fail|Pass| |10 bit ops|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Pass|Pass| |11 op a(hl)|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Pass|Pass|Pass|Fail|Pass| ||DMG Sound 2|| |01 Registers|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Pass|Pass|Fail|Pass| |02 Len Ctr|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Pass|Fail|Pass| |03 Triggers|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |04 Sweep|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |05 Sweep Details|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |06 Overflow on Trigger|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |07 Len Sweep Period Sync|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Pass| |08 len ctr during power|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Fail| |09 wave read while on|Fail|Fail|Pass|Fail|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Fail| |10 wave trigger while on|Fail|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Fail| |11 regs after power|Fail|Fail|Pass|Fail|Pass|Pass|Pass|Fail (crash)|Fail|Fail|Fail|Fail|Fail| |12 wave write while on|Fail|Fail|Pass|Fail|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Fail|Fail| ||Instr Timing|| |Instr Timing|Pass|Fail|Pass|Pass|Pass|Pass|Pass|Fail|Fail|Pass|Pass|Fail|Pass| ||Mem Timing 2|| |01 Read Timing|Pass|Fail|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Pass|Fail|Pass| |02 Write Timing|Pass|Fail|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Pass|Fail|Pass| |03 Modify Timing|Fail|Fail|Pass|Pass|Pass|Pass|Fail|Fail|Fail|Fail|Pass|Fail|Fail| ||OAM Bug 2|| |01 LCD Sync|Pass|Fail|Pass|Fail|Pass|Pass|Pass|Fail|Fail|Fail|Pass|Fail|Pass| |02 Causes|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail| |03 Non Causes|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass| |04 Scanline Timing|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail| |05 Timing Bug|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail| |06 Timing No Bug|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass|Pass| |07 Timing Effect|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail (crash)|Fail|Fail| |08 Instr Effect|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail|Fail| ---- [1] Not to be confused with Nintendulator.